RFSoC Based Quantum Control

Prof Rob Schoelkopf, Yale University
(September 2021 - Present)

Currently assisting in the development of a new RFSoC based control system for use in RSL and Michel Devoret's Group. As part of this I have wrote and debugged VHDL code pertaining to the signal generation capabilities of the system. I have additionally worked on Linux system programming and investigated its interactions with low-level FPGA design. This project is a collaboration with Quantum Circuits Inc.

This project further provided an opportunity for learning about pulse engineering for superconducting circuits, and techniques for high fidelity quantum control. Also gained practical experience in collaborating between academia and industry.

Microwave Signal Generation Nonlinearities

Prof Rob Schoelkopf, Yale University
(October 2021 - Present)

Personally investigating various techniques and limitations in modeling nonlinearities for microwave digital to analog converters. Further researched techniques in digital predistortion applied to signal generation, with preliminary results showing a 15 - 20dB improvement in spurious free dynamic range.

Project provided an opportunity to learn about nonlinear circuit analysis as well as gained a better understanding of lesser known nonidealities in a standard fridge RF stack.

Gave a talk on this work at the 2023 APS March Meeting titled "Characterization and Suppression of Nonlinearities in a Quantum Control System Employing Direct Digital Synthesis" [K70.00003].

Real Time Surface Code Decoding

Lin Zhong and Rob Schoelkopf, Yale University
(May 2021 - Present)

Created algorithm to apply graph theory principles in automatically computing optimal arrangement of FPGAs for lowering latency in a distributed surface code decoding algorithm. Developed Python software to automatically generate synthesizable Verilog hardware design files to this end.

Developed partial analytic argument for the open problem of average time complexity for a class of decoders for surface code syndromes. Developed VHDL module and Vivado hardware design for benchmarking communication protocols to nanosecond accuracy.

Co-authored preprint paper titled "Scalable Quantum Error Correction for Surface Codes using FPGA" [arXiv:2301.08419] as well as a 2023 APS March Meeting talk on the same topic [K71.00011].